I’m a Ph.D. candidate at the University of Michigan, Ann Arbor, advised primarily by Ron Dreslinski. I work at intersections of computer architecture, VLSI, and domain-specific hardware/software.

Previously I received an M.S. and B.S. from the University of Washington, Seattle, advised by Visvesh Sathe and Luis Ceze. I’ve also worked on R&D projects at Intel Labs and Intel PSG (formerly Altera), NVIDIA, and Electro Scientific Industries.

I value solving cross-stack problems, but also perform focused work in specific application areas. (Anecdotally, this approach has helped not only in practical skills and domain knowledge, but also for communication!)

[ Google Scholar, LinkedIn ]

Selected Works

Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm
❖ paper
❖ slides
  In VLSI 2021Invited to JSSC
Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration
  In PACT 2020
Bandwidth Extension on Raw Audio via Generative Adversarial Networks
  In arXiv 2019
Enabling Time-Critical Applications over Next-Generation 802.11 Networks (Demo Abstract)
  In INFOCOM 2018 – Conf. Best Demo
Energy-Efficient Neural Network Acceleration in the Presence of Bit-Level Memory Errors
  In TCAS-I 2018
MATIC: Learning Around Errors for Efficient Low-Voltage Neural Network Accelerators
❖ paper
❖ slides
  In DATE 2018 – Conf. Best Paper

Complete list (last updated: 07/2021).